IP for High Performance Computing-SoCs for Edge Computing-Chiplet 5nm

 Open Five Tapes Out SoC for Advanced HPC/AI Solutions on TSMC 5nm Technology. Open Five HBM3 and Die-2-Die (D2D) interfaces combined with SiFive E76 RISC-V CPU core enable High-performance chiplets and 2.5D based system-on-a-chip (SoC) designs. Open five a leading provider of customizable, silicon-focused solutions with differentiated IP, today announced the successful tape out of an IP for High-Performance Computing SoC on TSMC’s N5 process, with integrated IP solutions targeted for cutting edge High-Performance Computing (HPC)/AI, networking, and storage solutions.

 

The SoC features an Open Five High Bandwidth Memory (HBM3) IP subsystem and D2D I/Os, as well as a SiFive E76 32-bit CPU core. The HBM3 interface supports 7.2Gbps speeds allowing high throughput memories to feed domain-specific accelerators in compute-intensive applications including HPC, AI, Networking, and Storage. OpenFive’s low-power, low-latency, and highly scalable D2D interface technology allow for expanding compute performance by connecting multiple dice using an organic substrate or a silicon interposer in a 2.5D package.

 

OpenFive is one of a few companies with an idea-to-silicon methodology in TSMC’s latest 5nm technology, the most advanced foundry solution available with the best Power-Performance-Area (PPA). Combined with OpenFive advanced 2.5D packaging solutions and high performance, low power, and low latency HBM/D2D interface IP, designers can now create systems-on-chip (SoCs) that pack more computing power into smaller form factors for AI and HPC applications.

 

The SiFive E7-Series is a high-performance embedded 32-bit processor. The E76 configuration of the E7-Series includes SiFive Insight Trace and Debug technology, which enables core instruction trace streaming off-chip. This feature is a requirement for debugging complex real-time software stacks, as well as software verification and certification, providing software developers with deep insights into the performance and behavior of their applications.

 

“As a long-standing partner of TSMC through our Open Innovation Platform^® (OIP) Value Chain Aggregator (VCA) program, Open Five drives leading- SoCs for Edge Computing for HPC/AI, networking, and storage applications,” said Sajiv Dalal, Senior Vice President of Business Management, TSMC North America. “Open Five’s custom silicon solutions with differentiated IP, combined with TSMC’s N5process, enable our mutual customers to create next-generation SoCs that are highly optimized for power, performance, and cost.”

 

The demand for domain-specific silicon and workload-focused architecture is driven by several key factors. General-purpose processors used to be the workhorses for the majority of computing tasks. With transistor cost increasing, and the end of Den nard scaling, general-purpose processors have become very power-hungry and performance increases are hard to find from process technology alone – architecture plays a key role in workload acceleration. We’re not alone in seeing this opportunity, as leading technology companies are embracing domain-specific accelerators targeted for applications such as AI training/inference, network virtualization, and computational storage. Domain-specific or workload-focused silicon enables the cost-effective, scalable products desired by technology companies who want to own their
roadmap and vertically integrate their products with hardware and software IP. Open Five is built around a balance of silicon expertise and customizable IP, including a focused portfolio of SoC IP to enable key design features.

 

Open Five’s advanced design methodologies enable the use of leading-edge foundry nodes, including 5nm, with 2.5D packaging technology, to build Artificial Intelligence, Edge Computing, HPC, and Networking solutions. The Open Five IP portfolio includes low-latency, high-throughput Interlaken connectivity fabric, 400/800G Ethernet, High-bandwidth memory (HBM2/E), USB subsystem IP, and die-to-die interconnect IP for next-generation heterogeneous chiplet-style products. Open Five’s broad industry expertise enables us to develop SoCs with a variety of processor cores, including RISC-V architecture as well as processors from Arm, Cadence, CEVA, and Synopsys.

 

OpenFive Tapes Out SoC for Advanced HPC/AI Solutions on TSMC Chiplet 5nm OpenFive HBM3 and Die-2-Die (D2D) interfaces combined with SiFive E76 RISC-V CPU core enable high-performance chiplets and 2.5D based system-on-a-chip (SoC) designs. SAN MATEO, Calif. – April 13, 2021 – OpenFive, a leading provider of customizable, silicon-focused solutions with differentiated IP, today announced the successful tape out of a high-performance SoC on OpenFive Launches Die-to-Die Interface Solution for Chiplet Ecosystem Features IOs running at up to 16Gbps (effective throughput of ~1.75Tbps/mm) Features extremely low latency and <0.5pJ/bit offering best power performance benchmarks   SAN MATEO, Calif., April 5, 2021 – OpenFive, the leading provider of customizable, silicon-focused solutions with differentiated IP, today announced the launch of a Die-to-Die (D2D) PHY that complements the company’s existing D2D Controller